After months of refining, expanding, and pressure-testing the ideas I've shared in this newsletter, Low Latency Trading Insights: Selected Essays on Performance Engineering for High Frequency Trading is officially published.

If you've been reading along, you know what's inside: CPU architecture, cache optimization, SIMD vectorization, lock-free data structures, and the system-level details that production trading systems demand. Every chapter opens with a real incident—the $50,000 NVDA lesson, the lock-free order book that lost to a mutex, the memory pool that ate Chicago. Every benchmark runs on Intel Xeon and AMD EPYC with numbers you can reproduce.

This book exists because of the feedback, questions, and discussions from this community. Thank you for pushing me to be clearer, go deeper, and always show the measurements.

You can grab it here:

Henrique