I spoke with Dr. Barth, the eDRAM architect a few months ago, and he mentioned something about raw HBM silicon is best for new designs but is very pricey/hard to find. I think he said the lowest node that eDRAM was on was around 12-14nm (maybe just in the lab). Ambiq makes 3MB low power SRAM for their microcontrollers: contentportal.ambiq.com… around 12-22nm TSMC ULL. I’ve been interested in designing a low power application processor (like ARM9 or Quark D2000) with 8-16MB soldered on to run windows95 and linux just as a proof of concept, as the power consumption might be just 10mW for RAM+CPU. It’s interesting that Vik mentioned the maximum density for SRAM is around 40Mb/mm² and 200Mb/mm² for HBM. A single 300mm wafer could produce 58,880 Pentiums with embedded 4MB embedded SRAM. poe.com/chat/35o9u0bbbl…

I also read that the High NA EUV may be able to etch DRAM and logic on the same wafer so maybe that will become a cheaper option later on.