Mediatek's valuation has been revised upwards, with AI ASIC penetration and value enhancement at its core.

Goldman Sachs raised Mediatek's target price from NT$2,454 to NT$5,000, which reflects a re-modeling of the revenue structure and profitability over the next three years. It is estimated that AI ASIC revenue will be revised upwards to US$48 billion by 2028, accounting for 66% of total revenue, with EPS potentially reaching NT$406.51 and operating profit margin increasing to 33%. This set of assumptions directly re-evaluates Mediatek from a mobile SoC company, placing it at the core of the data center AI supply chain.

At this investor conference, almost all foreign investors' questions focused on ASICs. Bruce Lu concentrated on three things: whether the next-generation ASIC can extend from I/O die to compute die, the extent of the product ASP increase, and the change in gross margin after value addition. These three points actually correspond to the same thing – how much 'content' Mediatek can capture in the entire AI chip value chain.

Management's response has already indicated the direction. The next-generation chips will be larger and more powerful, with value coming from both silicon and packaging, and continuous reinforcement of high-speed interconnect IPs such as SerDes and die-to-die. This means Mediatek will not just remain a specific module supplier but will gradually extend towards chiplet integration and system-level design. As the design scope expands, ASP and gross margin structure will naturally move upwards in tandem, which is also the basis for Goldman Sachs' significant upward revision of 2028 revenue and profit.

The market size has also been adjusted upwards. Mediatek has advanced the cloud ASIC TAM to US$70-80 billion by 2027 and maintains a market share target of 10% to 15%. Based on this framework, US$2 billion in 2026 is just the starting point, entering multi-billion dollar scale in 2027, and after the second-generation projects ramp up in 2028, the revenue structure will show a significant shift. 

To understand this growth, one must first look at the competitive structure of the ASIC market.

The current market is not dominated by a single company but rather by CSPs (cloud service providers) who dictate the architecture, with design service providers responsible for implementation. Key suppliers are concentrated in Broadcom, Marvell, and Mediatek, while manufacturing and packaging are handled by TSMC. The key to competition is not who makes the strongest chip, but who can help customers complete designs faster, control costs, and achieve smooth mass production.

Broadcom is currently still the dominant player, with advantages in complete design capabilities and long-term customer relationships, especially in the training ASIC domain. However, its costs and bargaining power are higher, posing higher dependency risks for CSPs. Marvell leans towards network communication and data center integration, with deeper ties to AWS, but its penetration in the core of AI compute is still limited.

Mediatek's entry point is different: The first is its cost structure. As AI diffuses from training to inference, the key metrics shift from ultimate computing power to efficiency per watt and cost per token. Mediatek's capabilities in SoC integration and cost control make it more competitive in inference chip design.

The second is supply chain collaboration. AI ASIC is not just a design problem; it also involves advanced process technology and packaging integration. Mediatek's long-term partnership with TSMC provides flexibility in capacity allocation and process adoption, which for CSPs means lower uncertainty in delivery and mass production.

The third is the cooperation model. Mediatek offers highly flexible design support, allowing CSPs to retain architectural leadership, define their own systems, and then have Mediatek assist with implementation. This model helps large cloud providers diversify supplier risk and reduce reliance on a single vendor.

This is also the trend currently observed in the market: CSPs tend to adopt a multi-vendor strategy. Training, inference, memory, and networking will be handled by different design houses, forming a division of labor rather than a single supplier monopoly.

Within this framework, Mediatek's position is gradually becoming clear: entering the inference ASIC market with cost efficiency and execution capabilities, and then gradually extending to higher-value design content. If the second-generation projects can indeed penetrate compute die and a more complete chiplet architecture, the value will see a significant leap.

Packaging capability is another critical variable. AI chip sizes continue to grow, and HBM stacking, die-to-die connections, and power consumption control all rely on advanced packaging. Mediatek clearly stated at the investor conference that it is investing in two packaging solutions simultaneously and working with partners to advance yield and mass production. News reports mention that Douglas Yu, a former core figure in TSMC's advanced packaging, has joined. If true, this indicates that the company is strengthening its system integration and packaging capabilities, which will directly impact the delivery and gross margins of future projects.

The short-term fundamentals are still in transition. Q1 revenue was NT$149.2 billion, gross margin 46.3%, and EPS NT$15.17; Q2 guidance is flat to slightly down, with mobile demand affected by DRAM cost pressure. Smart edge and automotive businesses maintain growth but are not yet sufficient to change the overall structure.

The market is no longer looking at mobile phones, but at three key variables:

Whether the design scope of the second-generation ASICs can expand, the yield and mass production capabilities of the packaging routes, and the number and penetration rate of CSP projects.

These three factors will determine Mediatek's revenue scale and profit curve from 2027 to 2028. If the projects proceed smoothly, Mediatek's role in the AI supply chain will shift from a participant to a core node, and its valuation benchmark will change accordingly. Of course, competition from Broadcom, Marvell, and even Qualcomm in ASICs will be fierce, but I personally feel that in addition to not underestimating Mediatek's own capabilities, the assistance from the 'Sacred Mountain' (TSMC) to its Taiwanese allies might quietly become a critical force (this last speculation is my personal patriotic hope, better than those Taiwanese who constantly badmouth Taiwanese companies).